Which controller can I use that support RTOS?
A Scheduler can be written for most of the microcontrollers. Even the low end profiles such as 8051 can support RTOS (RTX51tiny, FreeRtos etc. have designed kernels for 8051). The choice of the MCU totally depends on the application requirement. But since we are building a kernel for ARM cortex-M profile of Microcontrollers we are going to focus our attention on the feature of cortex-m processors. ARM provides multiple OS support Features in their cortex-M profile using which the performance of the scheduler can be enhanced. Although we are not going to use all the features listed below but it is really important to have a basic understanding of these features.
So let’s take a look:
The above figure shows the register map of Cortex-M microcontroller .
There are 13 general purpose register <R0-R12> these are the register which the instructions will utilize for general execution . The register <R13> is the Stack pointer which points at the current location of the stack pointer in the memory. From the figure it can be observed that there are 2 different registers with the same name <R13>
• Main Stack Pointer (MSP): It is used by the operating system kernel, exception handlers and application codes that require privileged level access. This is the default stack pointer.
• Process Stack Pointer (PSP): This is used by the base-level application code (when not running an exception handler).
This is one of the OS support feature of ARM cortex-m i.e. this feature was added just so you can optimize and secure your operating system. This feature is known as Shadowed Stack pointer.
The <R14> link register which stores the address of the location where the program needs to jump whenever a branch with link instruction is executed. For example when you jump back from the function the return address is stored in the Link register.
The next is the program counter <R15> which stores the address of the current instruction which is being executed. Although this should be the case but in ARM cortex-m microcontroller a pipeline architecture is used hence the program counter is always pointing at the instruction ahead of the current executing instruction depending on the pipeline depth and structure.
There are 5 special purpose register known as the
PSRs (Program Status registers)
PRIMASK, FAULTMASK, and BASEPRI (The Interrupt Mask registers)
CONTROL (Control register)
Let’s see the operation and uses of each one of them.
-The Program status register (PSRs)
This register is divided into 3 parts:
• Application Program Status register (APSR)
• Interrupt Program Status register (IPSR)
• Execution Program Status register (EPSR)
The three PSRs can be accessed together or separately using the special register access instructions known as MSR and MRS. When these register are accessed collectively, the name xPSR is used. PSRs can be read using the MRS instruction. You can also change the APSR register using the MSR instruction, but EPSR and IPSR are read-only.
(PRIMASK, FAULTMASK, and BASEPRI)
the Interrupt mask register. The PRIMASK and BASEPRI registers are useful for disabling interrupts temporarily for timing critical tasks. FAULTMASK can be used to Disable Fault handling temporarily and an OS can make use of this feature .
In a faulty scenario, a number of different faults might be taking place when a task crashes. Once the core starts cleaning up, it might not want to be interrupted by other faults caused by the crashed process. Therefore, the FAULTMASK gives the OS kernel time to deal with fault conditions.
The control register
The control register is used to define the Selections between the main Stack pointer and Process stack pointer and the privilege level. This register has 2 bits CONTROL and CONTROL. The CONTROL is used to check the Stack Status i.e. one If the PSP is used and Zero if the MSP(default) is used.
The CONTROL bit defines whether the privileged in thread mode(1) or user state in thread mode(0). Cortex-m provides two different operating mode i.e. the Thread mode and the Handler mode. And two different access mode known as the Privileged mode and User mode. This different kinds of mode help in providing security and reliability for example a program with only user level Privileges cannot access any special function register or control register and if it tries to do so a fault handler exception will occur.
A program running in Privileged mode can access all the special and control register and can switch the program between user and Privileged level using the control register. The following diagram will give you a much better view between mode and Privilege levels.
The two operating mode are the thread mode which is known as your default main program and the handler mode which is triggered by the NVIC for exception Handling. The Handler mode is always privileged mode i.e. in an exception handler all the special purpose and control register can be changed.
From the above figure it can be observed that the switching from the user thread mode to privileged thread mode can be done only using the handler mode. For ex. If you want to write a privileged level software in user code you must first run into an exception handler mode which can then alter the control register to switch to privileged thread mode.
The Systick timer is a 24-bit down counter for generating periodic OS exception for time keeping and task management. This is a special timer which is present inside the core of the MCU. The reason we chose the Systick timer as our time based instead of the other timer present as a peripheral in the MCU is because the interrupt priority of the Systick timer is much higher than the priority of all the other timer and peripherals present in the MCU. Having a higher priority helps in assuring that the handler won’t be pre-empted while execution.
The PendSV and SVC exception
Supervisor Call (SVC) and Pendable Service Call (PendSV) are two exceptions provided for the software and operating systems. SVC is for generating system function calls. For example, an operating system may provide access to hardware through a Service call routine. Hence not allowing the user program to access hardware directly. So when a user program wants to use certain hardware, it generates the SVC exception using SVC instructions, and then the software exception handler in the operating system is executed and provides the service the user application requested. In short SVC helps to allows hardware access to unprivileged user level programs.
PendSV is usually used along with the SVC exception. Although SVC (by SVC instruction) cannot be pended (an application calling SVC will expect the required task to be done immediately), PendSV can be pended and is useful for an OS to pend an exception so that an action can be performed after other important tasks are completed. PendSV interrupt routine can be called by writing 1 to the PENDSVSET bit in the NVIC Interrupt Control State register (ICSR).
How will i start writing my own RTOS?
To start building your own RTOS you will require certain software and hardware for testing and debugging purposes. It is to be noted that there are lot of tools and hardware which can be used. But for the sake of convenience I have mentioned all tools and software used:
1. Keil Uvision:
Keil MDK is a software development solution for Arm®-based microcontrollers it includes all the components that you need to create, build, and debug embedded applications.
Here is the link to download keil Uvision 5: https://www2.keil.com/mdk5
2. Any MCU with ARM cortex-m3 or higher will do the trick. For this article series I’ll be using STM32f746. It is a CORTEX-M7 based microcontroller developed by ST microelectronics. they provide an Nucleo144 development board which has an on board ST-link debugger. It should be noted that whichever board you choose it should have an on-board debugger this will help you lot to resolve errors and check your outputs.
Now that we are acquainted with the internal aspects of the operating system and our hardware. We can now jump right into creating our own project and start building our scheduler.
Jayvik Desai is a final year student of electronics and communication at Institute Of Technology . Nirma University , Ahmedabad. His major area of interest include Robotics, embedded systems, Internet Of Things and Computer Vision. He has been a part of Team Nirma Robocon during his initial year at Nirma university. He has done some projects in embedded systems and robotics as a hobby and project submissions for college. He is also active as a researcher and has been able to convert one of his project on internet of things into a publication.
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