ARM QUIZ Part 1By Sanjay Adhikari / May 29, 2019 Time for QUIZ to refresh ARM architecture discussion done so far. Please put QUIZ name in the Message box below and submit before attempting the Quiz. ← BackThank you for your response. ✨ Name(required) Warning Email(required) Warning Website Warning Message Warning Warning. Submit Δ Please enter your email: 1. If a core supports only Thumb and Thumb-2 instruction sets, then which one of the following is True : Control register bit decides how many instruction bits to fetch First 5-bits of half word-2(hw2) determine whether fetch or not first half word part. First 5-bits of half word-1(hw1) determine whether fetch or not second half word part. complete 32-bit instruction to be fetched 2. M in ARM Cortex -M series stands for : ARM Multimedia core Micro-Controller ARM Multi-core device 3. Benefits of using Thumb instructions are as follows : Low power consumption High Power consumption Reduction in code memory Increase in code memory 4. What is Industry standard for designing ARM micro-controller bare metal device driver ? Cortex Microcontroller Software Interface Standard (CMSIS) Cortex Software Interface Standard (CSIS) Cortex Microcontroller Software Industry Standard (CMSIS) Cortex Microcontroller Software Standard (CMSS) 5. User application will run in Thread mode. If any interrupt or exception event occurs, It will automatically enters in : Background mode Exception Error mode Handler mode Low power mode 6. CMSIS is a ———- to integrate third-party software IDE Compiler Debugger Framework 7. SIMD register size , to process four 32-bit data elements at a time , is : 16 bit 32 bit 64 bit 128 bit 8. Use of two stack pointers in ARM architecture : Help in Multi-process Applications Not possible Wastage of temporary memory Efficient use of temporary memory 9. APSR -Application program status register can be accessed from : Both Privileged and Unprivileged level Unprivileged level only Privileged level only 10. Program counter in ARM Cortex M4 is Run-time Instruction Memory Pointer Run-time Instruction Execution Pointer Counter to record total instructions executed Loading … Question 1 of 10 Related