Fault Model based Validation for board HW and Post Silicon Validation

Time to market with excellent quality product is key to any business. It requires both efficient man power and  tools or fault finding techniques.
This article is based on fault-model based validation method developed by  Vijay Kriplani   .
Vijay is  Electrical engineering graduate (R.E.C. Tiruchirapalli) with Masters in Computer Engineering from  Louisiana State University . He has 24 years experience in HW/System software/Networking/Telecom domain.
 He has discussed the challenges  using diagnostic tools in validation process, fault based model, methodology  and benefits. This is followed by use case of fault model for I2C interface and algorithm developed.

Target audience:

1. HW and diagnostics engineering teams doing board validation
2. ASIC validation teams doing PSV (Post silicon validation).
If anyone from Hardware management team is interested on this ,  Please contact Vijay Kriplani   .  Engineering students interested for career in validation can contact Embedkari support team.
He has provided executive summary presentation of the proof of concept/ demonstration of fault model based board / PSV validation  .
You may  Downloadthe summary ppt
You may  find interesting topics at HowTo

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