QUIZ- Mixed Queries July 2019

This particular QUIZ has mixed questions . Click on the subject line.

This is a simple quiz with mixed embedded topics.

1. The UART section responsible for bit-rate of any MCU is called

 
 
 
 

2. Following registers in an SoC can’t be memory mapped

 
 
 
 

3. I2C BUS supports multiple address recognition

 
 

4. DDR controller is inialized in a Embedded system running linux by :

 
 
 
 

5. In Ethernet Controller , MAC communicates with PHY using :

 
 
 
 

6. An SoC contains CPU, DDR Controller , L1 Cache, I2C, SPI, DMA and Ethernet Controller . Incoming traffic on Ethernet controller has to be passed from Ethernet Controller to Memory connected via DDR Controller. This should be done without using CPU cycles. The best approach to achieve this will require

 
 
 
 

7. I2C is a uni-directional two wire bus

 
 

8. If you have to halt CPU based on some data comparison using SWD/JTAG based debugger, You need to use

 
 
 
 

9. Select the the item not relevant with others in following

 
 
 
 
 

10. If SPI controller working as a slave device, Its input data will be

 
 
 
 

Question 1 of 10

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