ARM – Advanced RISC Machines

This explains various concepts used in ARM architecture. It includes ARM ISA, ARM family, ARM Core, ARM Profile, ARM device  etc. This also discuss various important elements related to ARM architecture. As you know,  There are billions of ARM devices being used in many applications including industry, Automotive, Consumer , Networking etc.  This requires various features to meet optimal cost, performance and power.

ARM (Advanced RISC Machines) was originally Acorn RISC Machines. Lets try to understand various terms used in enhancing ARM features over several decades since 1990.

Scalar Programming   

Lets assume that you need to add elements of two different arrays A[]= {1,2,3,4} , B[]={7.5.46} and  store the result in third array C[] .  If you use for loop in C to achieve this , Compiler will generate corresponding assembly . Following is pseudocode to understand the same :

Scalar Program Pseudocode
         i =0
         Loop: Load A[i] 
               Load B[i]
               Add 
               Store C[i]
               increment i 
               compare i with 4 and if not equal, jump to Loop

Vector Programming

The operation described above can be achieved in a single instruction by ALU level parallelism i.e. using SIMD (Single Instruction Multiple Data) instruction. These instructions can process four 32-bit data elements at a time using 128-bit SIMD register.  This new data type is known as Vector. This will reduce number of CPU cycles because the operation done in four iterations using scalar programming can be done in single iteration here.

   Vector Program Pseudocode 
               Load vector A
               Load Vector B
               ADD
               Store Vector C

ARM ISA Important Elements

    • Instruction Support
      • ARM
        • A32(ARM instruction set)  Instructions with 32-bit size. These instructions xan operate with 32-bit registers.
        • A64 – It provides access to 64-bit registers and data. It includes signed and unsigned 32-bit and 64-bit multiply and divide instructions.
      • Thumb
        •  Thumb Initially introduced as 16-bit instructions
        • Thumb-2 is an enhancement to the 16-bit Thumb instruction set. It adds 32-bit instructions .The 32-bit instructions enable Thumb-2 to combine the code density of earlier versions of Thumb, with performance of the ARM instruction.
        • Renamed as T32 (Thumb Instruction set)  Instructions with  both 16 and 32-bit size instructions.
    • Pipeline Depth
    • Cache  -Instruction, Data , Unified
    • MMU  – Virtual to Physical translation
    • Jazelle DBX (Direct Bytecode eXecution) -To execute  Java byte codes  in hardware  
    • NEON  – Advanced extension to SIMD used in Audio and Video encoding/decoding, Graphics
    • VFP – Vector Floating Point Co-processor
    • Trustzone – Secure system
    • Execution States – ARM, Thumb and Java

ARM ISA

Classic ARM Processors

      • ARMv1 -ARMv3 are obsolete
      • ARMv4 , ARMv5, ARMv6 are classic ARM ISA

ARM Cortex Processors

    • ARM v7
      •  A series – Application Profile  – High performance multi-core
      •  M series- Micro-controller Profile  – Low Cost
      •  R series-  Real Time Profile  – Time critical applications
    • ARMv8-A
    • ARMv8-M

Lets look at different ARM architectures    ARM Architecture

ARM  Implementation Examples

NxP SoC Example 

ARMv7-M
CORTEX-M7
i.Mx 1050RT SoC

Similarly you may analyse  Broadcom SoC  in Raspberry PI

AND  analyze ST SoC in  STM32 Nucleo

You may also look at latest RISC based architecture  i.e. RISC-V

Reference

    • https://developer.arm.com/technologies/trustzone
    • https://www.nxp.com/docs/en/reference-manual/IMXRT1050RM.pdf
    • http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0419e/index.html

This particular post is discussed at ARM Architecture

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